%! PostScript set of library objects for XCircuit
%  Version: 3.6
%  Library name is: digitallib.lps
%  Author: R. Timothy Edwards <tim.edwards@multigig.com>
%

% XCircuitLib library objects
/digitallib::INV {
<</gnd (dgnd) /vdd (dvdd) /@index (?) /voltage () /strength (1) >> begingate
0 1.00 -32 -40 -32 40 40 0 3 polygon
1 1.00 48 0 8 0.00 360.00 xcarc
1 1.00 -32 0 -48 0 2 polygon
1 1.00 56 0 64 0 2 polygon
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -48 0 pinlabel
0.180 0.545 0.341 scb
mark voltage strength ( %pA %pY INVX) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -32 -136 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -32 -96 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.60 -8 0 label
mark strength {qS} (\327) {/Times-RomanISO cf} ctmk 16 0 0.60 0 24 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.70 8 -24 label
endgate
} def

<</strength (2) >> /digitallib::INV libinst
<</strength (4) >> /digitallib::INV libinst
<</voltage (_3V) /vdd (dvdd3) >> /digitallib::INV libinst
<</voltage (_3V) /strength (2) /vdd (dvdd3) >> /digitallib::INV libinst
<</voltage (_3V) /strength (4) /vdd (dvdd3) >> /digitallib::INV libinst

/digitallib::BUF {
<</gnd (dgnd) /vdd (dvdd) /@index (?) /voltage () /strength (2) >> begingate
0 1.00 -32 -40 -32 40 40 0 3 polygon
1 1.00 -32 0 -48 0 2 polygon
1 1.00 40 0 64 0 2 polygon
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -48 0 pinlabel
0.180 0.545 0.341 scb
mark voltage strength ( %pA %pY BUFX) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -32 -112 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -32 -80 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-RomanISO cf} ctmk 21 0 0.50 -8 0 label
mark strength {qS} (\327) {/Times-RomanISO cf} ctmk 16 0 0.50 8 24 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 16 0 0.60 24 -32 label
endgate
} def

<</strength (4) >> /digitallib::BUF libinst
<</voltage (_3V) /vdd (dvdd3) >> /digitallib::BUF libinst
<</voltage (_3V) /strength (4) /vdd (dvdd3) >> /digitallib::BUF libinst

/digitallib::NAND2 {
<</gnd (dgnd) /vdd (dvdd) /voltage () /@index (?) >> begingate
1 1.00 0 -48 -64 -48 -64 48 0 48 4 polygon
1 1.00 56 0 8 0.00 360.00 xcarc
1 1.00 0 0 48 -90.00 90.00 xcarc
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -64 32 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -64 -32 pinlabel
sce
1 1.00 -64 -48 -64 48 2 polygon
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pY NAND2X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -64 -128 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.70 -40 -8 label
0.180 0.545 0.341 scb
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -64 -96 infolabel
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::NAND2 libinst

/digitallib::NAND3 {
<</gnd (dgnd) /vdd (dvdd) /@index (?) /voltage () >> begingate
1 1.00 0 -48 -64 -48 -64 48 0 48 4 polygon
1 1.00 56 0 8 0.00 360.00 xcarc
1 1.00 0 0 48 -90.00 90.00 xcarc
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -64 32 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -64 0 pinlabel
(C) {/Times-Roman cf} 2 7 0 1.00 -64 -32 pinlabel
sce
1 1.00 -64 -64 -64 64 2 polygon
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pC %pY NAND3X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -64 -128 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -64 -96 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.70 -40 -8 label
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::NAND3 libinst

/digitallib::NAND4 {
<</gnd (dgnd) /vdd (dvdd) /voltage () /@index (?) >> begingate
1 1.00 0 -64 -64 -64 -64 64 0 64 4 polygon
1 1.00 56 0 8 0.00 360.00 xcarc
1 1.00 0 0 48 64 -90.00 90.00 ellipse
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -64 48 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -64 16 pinlabel
(C) {/Times-Roman cf} 2 7 0 1.00 -64 -16 pinlabel
(D) {/Times-Roman cf} 2 7 0 1.00 -64 -48 pinlabel
sce
1 1.00 -64 -80 -64 80 2 polygon
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pC %pD %pY NAND4X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -64 -144 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -64 -112 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.70 -40 -8 label
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::NAND4 libinst

/digitallib::NOR2 {
<</gnd (dgnd) /vdd (dvdd) /@index (?) /voltage () >> begingate
1 1.00 56 0 8 0.00 360.00 xcarc
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -64 32 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -64 -32 pinlabel
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pY NOR2X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -64 -128 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.70 -40 -8 label
sce
1 1.00 -35 48 96 270.00 330.00 xcarc
1 1.00 -64 -48 -35 -48 2 polygon
1 1.00 -128 0 80 -37.00 37.00 xcarc
1 1.00 -35 -48 96 30.00 90.00 xcarc
1 1.00 -64 48 -35 48 2 polygon
1 1.00 -64 32 -56 32 2 polygon
1 1.00 -64 -32 -56 -32 2 polygon
0.180 0.545 0.341 scb
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -64 -96 infolabel
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::NOR2 libinst

/digitallib::NOR3 {
<</voltage () /@index (?) /vdd (dvdd) /gnd (dgnd) >> begingate
1 1.00 56 0 8 0.00 360.00 xcarc
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -64 32 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -64 0 pinlabel
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pC %pY NOR3X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -64 -128 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -64 -96 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.70 -40 -8 label
sce
1 1.00 -35 48 96 270.00 330.00 xcarc
1 1.00 -64 -48 -35 -48 2 polygon
1 1.00 -128 0 80 -36.87 36.87 xcarc
1 1.00 -35 -48 96 30.00 90.00 xcarc
1 1.00 -64 48 -35 48 2 polygon
1 1.00 -64 32 -56 32 2 polygon
1 1.00 -64 -32 -56 -32 2 polygon
1 1.00 -48 0 -64 0 2 polygon
1.000 0.000 0.000 scb
(C) {/Times-Roman cf} 2 7 0 1.00 -64 -32 pinlabel
sce
1 1.00 -64 48 -64 64 2 polygon
1 1.00 -64 -48 -64 -64 2 polygon
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::NOR3 libinst

/digitallib::NOR4 {
<</gnd (dgnd) /vdd (dvdd) /@index (?) /voltage () >> begingate
1 1.00 56 0 8 0.00 360.00 xcarc
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -64 48 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -64 16 pinlabel
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pC %pD %pY NOR4X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -64 -128 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -64 -96 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 21 0 0.70 -8 -16 label
sce
1 1.00 -64 48 -58 48 2 polygon
1 1.00 -64 -16 -48 -16 2 polygon
1 1.00 -48 16 -64 16 2 polygon
1.000 0.000 0.000 scb
(C) {/Times-Roman cf} 2 7 0 1.00 -64 -16 pinlabel
sce
1 1.00 32 32 0 56 -40 56 48 0 spline
1 1.00 32 -32 0 -56 -40 -56 48 0 spline
1 1.00 -40 32 -40 -24 -64 -56 -64 56 spline
1 1.00 -64 56 -40 56 2 polygon
1 1.00 -64 -56 -40 -56 2 polygon
1.000 0.000 0.000 scb
(D) {/Times-Roman cf} 2 7 0 1.00 -64 -48 pinlabel
sce
1 1.00 -64 -48 -60 -48 2 polygon
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::NOR4 libinst

/digitallib::OR2 {
<</voltage () /@index (?) /vdd (dvdd) /gnd (dgnd) >> begingate
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -64 32 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -64 -32 pinlabel
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pY OR2X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -64 -128 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -64 -96 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.70 -40 -8 label
sce
1 1.00 -35 48 96 270.00 330.00 xcarc
1 1.00 -64 -48 -35 -48 2 polygon
1 1.00 -128 0 80 -37.00 37.00 xcarc
1 1.00 -35 -48 96 30.00 90.00 xcarc
1 1.00 -64 48 -35 48 2 polygon
1 1.00 -64 32 -56 32 2 polygon
1 1.00 -64 -32 -56 -32 2 polygon
1 1.00 48 0 64 0 2 polygon
endgate
} def

/digitallib::TBUF {
<</strength (2) /voltage () /@index (?) /vdd (dvdd) /gnd (dgnd) >> begingate
0 1.00 -32 -40 -32 40 40 0 3 polygon
1 1.00 -32 0 -48 0 2 polygon
1 1.00 40 0 64 0 2 polygon
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 0 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -48 0 pinlabel
0.180 0.545 0.341 scb
mark voltage strength ( %pA %pY %pEn TBUFX) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -176 -112 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -176 -80 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-RomanISO cf} ctmk 21 0 0.50 -8 0 label
mark strength {qS} (\327) {/Times-RomanISO cf} ctmk 16 0 0.50 8 24 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 16 0 0.60 24 -32 label
sce
1 1.00 0 24 0 48 2 polygon
1.000 0.000 0.000 scb
(En) {/Times-Roman cf} 2 17 0 1.00 0 48 pinlabel
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::TBUF libinst

/digitallib::MUX2 {
<</gnd (dgnd) /vdd (dvdd) /@index (?) /voltage () >> begingate
1 1.00 -16 16 -32 16 2 polygon
1 1.00 48 -16 64 -16 2 polygon
1.000 0.000 0.000 scb
(Y) {/Times-Roman cf} 2 4 0 1.00 64 -16 pinlabel
(A) {/Times-Roman cf} 2 7 0 1.00 -32 16 pinlabel
0.180 0.545 0.341 scb
mark voltage ( %pA %pB %pY %pS MUX2X1) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -128 -176 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -128 -144 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-RomanISO cf} ctmk 21 0 0.50 16 -16 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 28 0 0.60 24 -80 label
sce
1 1.00 16 32 16 64 2 polygon
1.000 0.000 0.000 scb
(S) {/Times-Roman cf} 2 17 0 1.00 16 64 pinlabel
(B) {/Times-Roman cf} 2 7 0 1.00 -32 -48 pinlabel
sce
1 1.00 -32 -48 -16 -48 2 polygon
1 1.00 -16 48 48 16 48 -48 -16 -80 -16 48 5 polygon
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::MUX2 libinst

/digitallib::LATCH {
<</@index (?) /voltage () /vdd (dvdd) /gnd (dgnd) >> begingate
1.000 0.000 0.000 scb
(Q) {/Times-Roman cf} 2 4 0 1.00 32 32 pinlabel
(D) {/Times-Roman cf} 2 7 0 1.00 -64 32 pinlabel
(CLK) {/Times-Roman cf} 2 13 0 1.00 -16 -48 pinlabel
0.180 0.545 0.341 scb
mark voltage ( %pCLK %pD %pQ LATCH) gnd ( ) vdd ( ) @index (spice:X) 
{/Times-Roman cf} ctmk 16 360 0.70 -192 -160 infolabel
mark (.cir) voltage (spice@1:%F$XCIRCUIT_LIB_DIR/standard_cells) {/Times-Roman cf} 
ctmk 16 0 0.70 -192 -128 infolabel
0.647 0.165 0.165 scb
mark voltage {/Times-Roman cf} ctmk 21 0 0.70 -16 64 label
0.000 0.000 1.000 scb
mark @index (U) {/Times-RomanISO cf} ctmk 17 0 0.70 -16 128 label
sce
0 1.00 -64 -48 -64 112 32 112 32 -48 4 polygon
1 1.00 -32 -48 -16 -32 0 -48 3 polygon
(D) {/Times-Roman cf} 2 21 0 0.70 -48 32 label
(Q) {/Times-Roman cf} 2 21 0 0.70 16 32 label
0.000 0.000 1.000 scb
(LATCH) {/Times-Roman cf} 2 29 0 0.70 -16 96 label
endgate
} def

<</voltage (_3V) /vdd (dvdd3) >> /digitallib::LATCH libinst

% EndLib
