Netgen 1.4

Table of Contents

Using Netgen Version 1.4
Integrating Netgen With Tcl/Tk-Based Magic

Using Netgen version 1.4:

Command-line invocation:

netgen
There is (currently) no batch-mode invocation of netgen. The above command will bring up a console window (Tcl-based version, preferred), or generate a prompt at the terminal. Because the Tcl-based version is vastly superior, usage information on this website will primarily focus on that version.

Using Tcl-based Netgen:

The Tcl command-line commands completely replace the original command-line interface, which consisted on one-key entries in a hierarchically stacked format, difficult to use. I have removed the interface and replaced it with Tcl command-line commands plus a few scripts. These are outlined below. The original X11 interface was a complete and unnecessary disaster and has been removed. With the Tcl interface, it could presumably be rewritten in Tk, although personally, I can't see why anybody would want to.

The most common use of "netgen" is to make use of its network comparison feature to compare a layout generated from magic with "extract" and "ext2spice" commands against a layout generated from a schematic (e.g., xcircuit). Starting with version 1.2, there is a script-level command which performs the sequence of commands above. This command is:

Arguments circuit1 and circuit2 are both filename and cellname, and assume that each file contains a top-level cell that is not defined as a subcircuit (thus the filename becomes the name of the top-level cell). The alternative syntax is to give, for one or both of the circuits, a separate file and cell name. This covers cases where the file does not contain a top-level cell, and also cases in which one wants to run LVS starting at a level of hierarchy lower than the top. logfile is the file to dump all output, and defaults to "comp.out" if not specified. Note that certain useful information, such as the initial report on the two files, and the final "yea or nay" result, is duplicated both to the log file and to the console (or terminal) window. The output file should be consulted for all detailed information about netlist errors. The optional file setup_file is a Tcl-format file containing any commands that should be run after both files are read in but before the comparison is made. Typically, this will contain information on how to map device model names or subcircuit names between the two files, and how to permute pins on subcircuits.

The most common use of setup_file is to map subcircuit names between the two circuits. Each line of the file should contain the command

equate classes name1 name2
declaring that device class or subcircuit name name1 in circuit1 is equivalent to device class or subcircuit name name2 in circuit2. If the setup_file is not present, then the default setup file name "setup.tcl" will be read, if it exists. If not, then every device class in circuit1 must have the same name as that used in circuit2, or else the circuits will never match. In SPICE files, each semiconductor device has a model name, which netgen uses as the device class. Devices with different models are compared independently. In addition, if no setup file is specified, then default permutations are allowed (transistor sources and drains permute, and resistor endpoints permute).

The command sequence used by the lvs command to compare two netlists is as follows:

Arguments circuit1 and circuit2 are filenames. They do not need to have the file extension if a standard extention (.sim, .spc, .spice) is used, but do need to contain any directory path components (relative to the current working directory).

For circuits which do not match, it will be necessary to run the command "verify" to look at the list of illegal elements and nodes.

Note that the "verify" command produces copious output. Generally, it is preferable to use the "log" command to dump this output to a file. The command "verify only" produces just one line stating whether or not the circuits match. The output can be terminated at any time with a Control-C interrupt into either the terminal or console windows.

Using the non-Tcl-based (legacy) Netgen:

Information on the legacy version of netgen can be found in the source doc directory, in the file netgen.doc. This text file has been formatted for a web browser and can be found here.

Standalone programs

For a long time, I did LVS by compiling netgen and using the standalone program "netcomp" for the LVS part, ignoring the rest of the "netgen" package, which largely deals with handling the loading and conversion of different netlist formats.

Version 1.3 dispenses with the standalone programs, instead making the command-line interface more accessible. See the description of Tcl commands below for details.

Tcl Command-Line Interface

(A complete list of command-line commands: To be finished. For now, a dump of commands from the source code. . .)

Netlist manipulation commands:

readnet [format] file
read a netlist file (default format=auto). Auto-detection first looks for files with standard extensions. If no file is found with a standard extention, then the file is checked for the initial character, which is always "*" in SPICE files and "|" in .sim files.
readlib format
Initialize a library module definition, where format is either actel or xilinx. The library definitions need to be initialized prior to reading any netlist file that is to be rewritten as "writenet actel filename" or "writenet xilinx filename".
writenet format file
write a netlist file
flatten cell
flatten a hierarchical cell. Note: Always flatten a cell in a hierarchical format (such as SPICE) before writing a flat format, even if the original netlist is already flat. Otherwise, the flattened namespace will not be cached, and the write process will incur a horrific performance hit.
primitive cell
declare a cell to be primitive
nodes [element] cell
print nodes of an element or cell
elements [node] cell
print elements of a node or cell
debug on|off|command [options...]
turn debugging on or off or debug a command
protochip
embed protochip structure
instances cell
list instances of the cell
contents cell
list contents of the cell
describe cell
describe the cell
cells [list|all]
print known cells
option all: print all cells, including primitives
ports cell
print ports of the cell
leaves [cell]
print leaves of the cell
quit
exit netgen and Tcl
reinitialize
reintialize netgen data structures
log [file name|start|end| reset|suspend|resume|echo]
enable or disable output log to file named file.
help
print basic usage information
Netlist comparison commands:
compare cell1 cell2
declare two cells for netlist comparison. Subcircuits that are not declared equivalent or that do not have the same name in both cells are flattened. Otherwise, subcircuit instances will be compared as black-box devices, without comparison of their contents (if any).
compare hierarchical [cell1 cell2]
do a full hierarchical comparison. The first call must declare the two top-level cells cell1 and cell2. The cell hierarchy will be searched; all cells with matching names or cells that are declared equivalent will be saved in a stack. All cells whose match in the other top-level cell's hierarchy cannot be determined will be flattened. Upon the completion of the search, the top of the stack (the bottommost cells in the hierarchy) will be prepared for comparison. Subsequent calls to compare hierarchical should be called without any arguments. Each time compare hierarchical is called, the next pair of cells is taken off of the top of the stack and prepared for comparison. Once there are no cell pairs left to compare, compare hierarchical returns the string "empty queue".
iterate
do one netlist comparison iteration
summary [elements|nodes]
summarize internal data structures
print
print full report on the internal data structures
run [converge|resolve]
with option converge: run netlist comparison to completion (convergence)
with option resolve: run to completion and resolve automorphisms
verify [elements|nodes|only| equivalent|unique]
verify results
automorphisms
print automorphisms
equate [elements|nodes|classes] name1 name2
equate pins
with option elements: equate two elements
with option nodes: equate two nodes
with option classes: equate two device classes.
The name name1 must belong to the first of the two circuits being compared and name2 must belong to the other one.
with option pins: equate pins in the two cells being evaluated. This requires that two cells have been declared with the compare hierarchical command, and that LVS has run to convergence on any pair of cells in the stack (see compare hierarchical), and the netlists verified as matching. The equate pins command will sort the ports of one cell to match those of the other.
permute [transistors|resistors|capacitors]
permute pins model pin1 pin2
with option pins: permute pins pin1 and pin2 on device model. If more than two pins may be permuted, this command may be issued multiple times between pairs of pins.
With option transistors: enable transistor source/drain permutations for any device recognized as a MOSFET.
With option resistors: enable permutations of resistor endpoints.
With option capacitors: enable permutations of capacitor top and bottom plates. Because capacitor top and bottom plates have different parasitics, capacitor plate permutation is not normally enabled.
With no options: enable transistor source/drain and resistor endpoint permutations.
exhaustive
toggle exhaustive subdivision
restart
start over (reset data structures)
matching [element|node] name1
return the corresponding node or element name in the compared cell
Scripted Tcl procedures:
lvs circuit1 circuit2 [setup_file] [logfile]
lvs { file1 cell1} { file2 cell2} [setup_file] [logfile]
Run the netlist comparison commands to load and compare the two netlists, leaving the bulk of the output in the file logfile (defaults to "comp.out" if unspecified), with a succinct summary printed to the terminal. If the optional setup_file is present, source this file prior to comparing the circuits. This file is Tcl-syntax compatible, and normally contains netgen commands that affect the way LVS is run. Typical commands used in the setup file are "equate classes..." and "permute...". If setup_file is not present, netgen will check for the default setup filename "setup.tcl", and source it if it exists. If no setup file exists, then default permutations (transistor source/drain and resistor endpoints) are used, and no assumptions are made about class equivalences. The LVS comparison is hierarchical (see command "compare hierarchical", above). If the files to be compared have a top-level structure (that is, components that are not inside a subcircuit definition), then the first syntax is used, and the top-level cell takes the (full) name of the filename. If the files contain all subcircuit definitions, or one wishes to compare cells below the top level of hierarchy, then the second form may be used, where one or both circuits may be split into a list of two items, the first being the filename, and the second being the name of the subcircuit to compare. The second form was introduced with netgen version 1.4.13.

Integrating Netgen With Tcl/Tk-Based Magic

Currently, there are no specific advantages to using netgen directly under magic. It is still necessary to run the "extract" and "ext2spice" commands to generate a netlist, then run netgen's "lvs" command to compare the layout-derived netlist to a schematic-derived netlist.

Magic versions 7.5 and 8.0, as of December 2010, have an option "ext2spice hierarchical on", that will produce hierarchical netlists for LVS using the netgen "lvs" command. Of course, it is still possible to compare flattened netlists, but hierarchical comparison is vital for any large project.

See the "To-Do" section in the release notes for more on planned integration capabilities.

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Last updated: December 21, 2010 at 6:30am