[Xcircuit-dev] Re: xcircuit netlist->pcb
R. Timothy Edwards
tim at stravinsky.jhuapl.edu
Tue Oct 23 07:51:38 PDT 2001
Dear Bryce,
Sorry about the lateness of this reply. I was under the impression
that I was actually signed up on my own mailing list, but this appears
to not have been the case. I have corrected that problem, and now I
should get these posts sent directly to me so I don't have to keep
visiting the SourceForge website to see what's going on.
> Between xcircuit and pcb, we are really close to having a schematic+layout
> flow for circuit boards.
That was the intention. With me and Harry Eaton working at the same place,
it was my hope that regardless of which program needed a change for the
sake of compatibility, we could easily work something out.
> All the transistor models in generic and analoglib2 have letter-named pins,
> such as B for base and E for emitter
I'm not going to apologize for being a VLSI designer. It's what I do. But
it means that my netlists don't really look like your netlists, so you have
to get used to the fact that libraries like "analoglib2" were really designed
for VLSI work, not PCB work. What is really called for here is a separate
library (I should probably make it default, too, since more people seem to
use xcircuit for PCB netlisting than for VLSI netlisting). In particular,
such a library would have symbols for TO-packaged transistors, where pins
"1", "2", and "3" make sense (maybe with a circle around the transistor
symbol, which seems to be more standard for PCB schematics than for VLSI
schematics). Such a library would also be the proper place for transformers,
crystals, voltage regulators, and such, and MOSFETs and other mainly VLSI
components could be moved to a different page. What do you think?
> Pcb's netlist reader is very picky about pin numbers and node names.
However, PCB itself seems to be very liberal about pin naming conventions.
I will ask Harry if he thinks the netlist reader syntax can be extended to
include arbitrary names for pins, or whether that would break stuff right
and left. If there's a file format standard he's following, we might have
to go back to that to make changes.
> Another issue that's minor but confusing is that it's possible to get two
> Vdd nodes in the netlist.
To a point, that's intentional. If you want a Vdd pin which gets merged
with the rest of the Vdd network, it should be declared "Global"
(menu "Netlist->Make Global Pin"). It's really the same problem as
declaring the scope of a variable in software. It prevents bad things
from happening such as declaring a global name "E" and having it suddenly
connect together every emitter of every bipolar transistor in your
schematic.
Regards,
Tim
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