Open Circuit Design / Chipalooza
Challenge #2 (IHP) and #3 (Wafer.Space) are underway

The Chipalooza Challenge

Open source analog IP for the SoCs of tomorrow

Five shuttle challenges across three major open-source PDKs. Design an analog IP block, get it fabricated, and win awards for your effort.

Generously underwritten by Vensa

See the Challenges Get Involved
Analog IP block layout example
An analog IP block designed for Chipalooza Challenge #1 (Efabless, Sky130, 2024)

The goal of Chipalooza Challenge is to provide open source libraries of high-quality analog components useful to designers of SoCs for all three major open source PDKs, enabling cross-platform porting of SoCs and a shared home for the IP that analog designers need. Challenge #1, run by Efabless in 2024, produced dozens of analog circuits for Sky130 across two test chips. The five challenges below continue that work: two more rounds each for Sky130, GF180MCU, and IHP SG13CMOS5L.

The Five Challenges

2

Challenge #2 — IHP SG13CMOS5L

Run through IHP. Launched July 13, 2026. Proposal review complete (38 designs); schematic design underway.

In Progress
3

Challenge #3 — GF180MCU

Run through Wafer.Space. Launched August 17, 2026. Proposals currently being accepted.

In Progress
4

Challenge #4 — Sky130

Run through Chip Foundry. Expected launch November 2026.

Upcoming
5

Challenge #5 — GF180MCU

Run through Wafer.Space. Expected launch January 2027.

Upcoming
6

Challenge #6 — IHP SG13CMOS5L

Run through IHP. Expected launch June 2027.

Upcoming

The Schedule at a Glance

Challenge #1 was the original Efabless-run Sky130 challenge in 2024, already completed; dozens of analog circuits taped out across two test chips. Challenges #2–#6 below are the new Open Circuit Design-run series, restoring one challenge for each PDK and adding a second round for each.

ChallengePDKPlatformLaunchProposals DueStatus
#2IHP SG13CMOS5LIHPJul 13, 2026Jul 27, 2026In progress
#3GF180MCUWafer.SpaceAug 17, 2026Aug 31, 2026In progress
#4Sky130Chip FoundryNov 9, 2026Nov 23, 2026Upcoming
#5GF180MCUWafer.SpaceJan 4, 2027Jan 18, 2027Upcoming
#6IHP SG13CMOS5LIHPJun 21, 2027Jul 5, 2027Upcoming

Note that IHP tapeouts are scheduled several years in advance. The schedules for Chip Foundry and the second Wafer.Space run are based on past shuttle runs. Once information about tapeout schedules is available on the Wafer.Space or Chip Foundry websites, the schedules will be updated. See each challenge's own page above for its full milestone-by-milestone schedule.

How do I get involved? Keep up with posts on fossi-chat.org/#chipalooza, pick a challenge above, and send in your analog IP proposal by its posted due date. See Get Involved for how to submit.